PAL and PLA Devices
The first step in designing a sequential digital circuit is to construct a "state diagram" indicating the state transitions and output signal resulting from the application of various input signals. A so-called "Moore" machine is one in which the output signals are dependent only on the state, while in a so-called "Mealy" machine, the output signals are dependent both on the state and the input signals. Presently, programmable array logic (PAL) devices, and programmable logic array (PLA) devices find application for controlling digital circuitry, such as in "state machines" or sequencers, requiring flexibility and ease of use.
Although such PAL/PLA devices operate with speed and flexibility, they are difficult to program, since they require writing complex Boolean expressions for this purpose. The use of Boolean equations to design the sequencer limits the number of variables available to the designer to eight because of the mathematical difficulties in specifying and simplifying equations having typically more than eight variables. Moreover, such sequencers require additional external circuitry to provide flexibility as well as additional conditional input testing circuitry.
Particular difficulty is encountered when programming and understanding a general PAL or PLA device used to perform higher level logical functions such as counting, state sequencing, branching, or multiple-case testing. No higher level logic blocks, especially program counters, are available in such devices which can be readily programmed or easily understood. The absence of these higher level logical blocks makes it very difficult to implement with PALs and PLAs sequencers and state machines with high level language-based state machine constructs. Also, lack of these high level logical blocks makes current PAL/PLA device architecture unoptimized for control logic applications.
While to reduce programming effort and to ease understandability, some higher level language (HLL) programming schemes may be used, there is no direct relationship between such HLL constructs and the underlying hardware. As such, no methodology is available which affords easy design of the microsequencer (because no high level constructs are readily available within the PAL- or PLA-based sequencers) corresponding to the high level language constructs most useful to design personnel. Complex, detailed and error-prone Boolean equations must be written presently to accomplish the design of PAL- or PLA-based sequencers. Such equations do not bear a one-to-one correspondence to the underlying circuit elements of the PAL- or PLA-based sequencer. Because of all these reasons, PAL/PLA devices are not used for large complex control applications.